The beginning…

A couple of weeks back I started designing my own CPU (called Bizzas CPU) in Quartus II with the initial goal of getting it running on an FPGA. Right now im bouncing between many different tasks as well as trying to just chillax from time to time.

Elements of a CPU such as registers, program counters and ALU‘s are pretty easy to design. I have most of that done. My current task is to design a robust and efficient instruction decoder, or instruction executor as I call it. After that, I will make an instruction loader.

Once those are done, the CPU will hopefully be ready to run inside the FPGA without any significant connections to the outside world. Then the next step is to wire it up to some memory and other peripherals, maybe even make a VGA interface.

End goal is ofcourse world domination!

Here is what a 1-bit ALU block looks like inside:

alu1bit

This particular configuration can do add, subtract, XOR, AND and OR. Not bad for only 7 logic gates.

My project is shared in its entirety on GitHub: https://github.com/joonicks/BizzasCPU

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